Our invention relates to semiconductor devices capable of supporting high reverse voltages while in a current-blocking state, and, more particularly, to such devices having highly-doped buried layers for reducing parasitic currents.
A typical prior art, high voltage P--N diode is described, for example, in an article by J. A. Appels and H. M. J. Vaes, "High Voltage Thin Layer Devices (RESURF Devices)", Proceedings of the 1979 IEEE International Electron Device Meeting, pages 238-241. The high voltage P--N diode described in such article includes a "P.sup.- ", or lightly-doped, P type substrate with a thin N.sup.- epitaxial layer atop the substrate. A "P.sup.+ ", or highly-doped P type, isolation region surrounds the periphery of the N.sup.- epitaxial layer and is integrally connected to the P.sup.- substrate. The P.sup.+ isolation region and the P.sup.- substrate together implement the P type anode portion of the P--N diode. An N.sup.+ region extends into the center of the epitaxial layer's upper surface. The N.sup.+ the N.sup.- epitaxial layer, implement the N type cathode portion of the P--N diode.
Deficiencies exist in the foregoing arrangement of a prior art P--N diode. First, it is not possible for a plurality of such P--N diodes to be integrated in a single wafer of semiconductor material which possesses the beneficial capability of allowing independent biasing of each diode. This is because the P anode portion of each diode must be referenced to the same potential: namely, the potential of a P.sup.- substrate which constitutes a region in common with the respective anode portion of each P--N diode. A second deficiency is that the foregoing arrangement of a prior art P--N diode does not allow the integration of logic or analog semiconductor devices along with such P--N diode in the same wafer of semiconductor material. This is because a P.sup.- substrate, which would be common to both a logic or analog device and the P--N diode, would need to be referenced to the most negative potential of the wafer to enable proper operation of the logic or analog device. Proper operation of the P--N diode, however, incompatibly requires that its N.sup.- cathode portion be at a lower potential (i.e., by an amount equal to the inherent voltage of the diode than its P anode portion which includes the P.sup.- substrate.
The foregoing deficiencies may be overcome by implementing the P anode portion of a P--N diode as a separate P.sup.+ region which extends partially into the N.sup.- epitaxial layer from the upper surface of such layer and which surrounds the N.sup.+ cathode portion of the diode. The inclusion of the separate P.sup.+ anode portion in the P--N diode, however, would give rise to undesirable parasitic currents in the diode.
One such parasitic current would flow between the separate P.sup.+ anode portion and the P.sup.- substrate when the P--N diode were in its current-conducting state. This current typically would comprise most of the otherwise attainable P--N diode current and would constitute current in a parasitic P--N--P transistor formed from the separate P.sup.+ anode portion of the diode, the N.sup.- epitaxial layer, and the P.sup.- substrate. Another parasitic current could flow between the separate P.sup.+ anode portion and the P.sup.- substrate if the P--N diode were in its current-blocking state and a high voltage were present on the N.sup.+ cathode portion of the diode. In this situation, a depletion region, which would be induced in the N.sup.- epitaxial layer, would connect together the P.sup.+ anode portion and the P.sup.- substrate. Parasitic current would then flow between these regions when the P.sup.+ anode portion were biased sufficiently higher in potential than the P.sup.- substrate, as is typically the case, so that the potential in the depletion region would monotonically decrease from the P.sup.+ anode portion to the P.sup.- substrate. This condition is known as depletion layer punch-through. The foregoing parasitic currents would reduce the current density of the P--N diode and increase its heating losses.
The foregoing parasitic currents can be largely reduced or even eliminated by incorporating in the P--N diode an N.sup.+ "buried layer", or N.sup.+ region situated between the N.sup.- epitaxial layer and the P.sup.- substrate, beneath the P.sup.+ anode portion. In the case of parasitic current flowing in the parasitic P--N--P transistor, the level of such parasitic current is highly reduced because the N.sup.+ buried layer highly reduces the gain of the parasitic P--N--P transistor. In the other case of parasitic current flowing from the P.sup.+ anode portion to the P.sup.- substrate due to the existence of a continuous depletion region connecting these regions, the N.sup.+ buried layer typically eliminates this currents by preventing the formation of such continuous depletion region. However, the inclusion of the N.sup.+ buried layer in the P--N diode destroys the capacity of the diode to block current when a high reverse voltage is impressed across the diode (i.e., when its N.sup.+ cathode portion is biased at a high voltage with respect to its P.sup.+ anode portion). As used herein, "high voltage" signifies voltages in excess of about 20 volts that are typically encountered in semiconductor devices used in power switching applications, as opposed to logic switching applications. Accordingly, it would be desirable to provide a semiconductor device that overcomes the foregoing parasitic current problems, yet which retains unimpaired its capacity to block current at high reverse voltages.
While the foregoing deficiencies of prior semiconductor devices have been described with specific reference to P--N diodes, they are also encountered in high voltage N--P--N transistors which are structurally similar to the above-described P--N diodes, except for the inclusion of an N.sup.+ emitter region wholly within a P.sup.+ base region which corresponds to a P.sup.+ anode portion of a P--N diode.